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Multi-Chip (MCP) & Stacked-Die Leadframe Packages
Amkor's multi-chip package and stacked-die leadframe designs enable package level integration in a low cost, leadframe-based form factor. Leveraging existing leadframe-based manufacturing capabilities and infrastructure allows for stable, high volume production, and adds flexibility to system designs to provide smaller, denser footprints. This results in more efficient use of motherboard real estate, and a lighter, smaller overall system which supports end system level cost reductions.
Multi-chip and stacked package solutions may be offered in a variety of plastic packages including TSOP, TSSOP, SSOP, LQFP, PLCC, MQFP, MicroLeadFrame®, SOIC, PDIP and ExposedPad™ designs.
Stacked-Die leadframe packages combine Amkor’s wafer backgrinding, wire bonding and mold process expertise to offer double the memory density for increased device functionality, while allowing manufacturers to maintain size reduction roadmaps. Stacked-die leadframe packages are offered in small die / large die and similar (same) die size stacks. In addition, die can either be stacked on top of each other or on either side of a leadframe die paddle.
The MCP differentiates itself from the stacked-die leadframe package in that multiple die are placed on one or more die paddles next to each other. A custom option incorporating a laminate substrate can be made available to increase die-to-die routing density and provide controlled impedance.
Amkor also provides substrate interposer solutions for stacked die routing challenges. Laminate and silicon based interposers are available. For applications with minor routing demands, custom designed leadframe options are also available.
- MCP 1 - Chips or passives directly mounted on a standard die paddle.
- MCP 2 - Chips or passives directly mounted on a split pad or custom leadframe.
- MCP 3 - Chips or passives mounted to a custom substrate (laminate, ceramic or silicon) attached to a die paddle.
Applications:
MCP and stacked-die leadframe packages are designed for products requiring increased memory density and / or integration of two or more device types to maximize performance while reducing package size. Automotive and portable electronics products such as cell phones, PDAs, camcorders, CATV / RF modules, MMC, USB drive, and other wireless consumer systems can benefit from the combination of MCP and stacked-die leadframe packages offered by Amkor. PCs, disk drive, set-top box, and flat panel display are also good application area for stack-die package.
Features:
- Standard JEDEC package outlines
- GaAs wafer handling
- Thin (<1.4 MM) Profiles Now Available
- Flash / SRAM combination
- Logic / Flash, Analog RF / Logic, IPNs / Logic combinations
- Increased routability with MCP 3
- Cost effective
Thermal Resistance:
Multi-Layer PCB, Pre-JEDEC Standard Test Boards
| |
|
|
Theta JA (°C/W) by Velocity |
| Pkg |
Body Size (mm) |
Pad Size (mm) |
0 |
200 |
500 |
| 8 ld |
4.9 x 3.8 |
2.3 x 2.3 |
112.7 |
103.3 |
97.1 |
| 28 ld |
7.6 x 18.0 |
5.6 x 4.1 |
46.2 |
39.7 |
36.8 |
Electrical:
Simulated Results @ 100 MHz
| Pkg |
Body Size (mm) |
Pad Size |
Lead |
Inductance (nH) |
Capacitance (pF) |
Resistance (m ) |
| 8 ld |
4.9 x 3.8 |
3.6 x 2.3 |
Longest |
1.250 |
0.263 |
8.2 |
| 8 ld |
4.9 x 3.8 |
3.6 x 2.3 |
Shortest |
0.718 |
0.218 |
5.1 |
| 28 ld |
7.6 x 18.0 |
4.8 x 6.4 |
Longest |
5.050 |
1.090 |
28.7 |
| 28 ld |
7.6 x 18.0 |
4.8 x 6.4 |
Longest |
1.420 |
0.345 |
8.04 |
Reliability:
Amkor’s multi-chip and stacked leadframe packages are assembled in optimized package designs with reliability-proven semiconductor materials:
| PCT: |
121°C, 2 atm, 100% RH, 504 hours |
| Moisture sensitivity characterization: |
JEDEC Level 3, 30°C / 60% RH, 192 hours |
| Temp Cycle: |
-65°C / +150°C, 500 cycles or -55°C / +125°C, 1000 cycles |
| Temp / Humidity: |
85°C / 85% RH, 1000 hours |
| High Temp Storage: |
150°C, 1000 Hours |
MCP Process Highlights:
| Die thickness (max): |
18 mil (>1.4 mm pkg thickness) |
| Die thickness (max): |
12 mils max (<1.4 mm pkg thickness) |
| Die quantity: |
Up to 4 in production |
| Solder plating: |
85/15 Sn/Pb (PB Free option available) |
| Strip Marking: |
Laser |
| GaAs wafer handling: |
Wafer format, pre-sawn on rings, scribe and break |
| Wafer backgrinding: |
Not offered for GaAs, others available |
Multi-Chip and Stacked-Die LF Process Highlights:
| Die thickness: |
3 mils / 18 mils (min/max) |
| Die attach: |
Silver-filled epoxy / Non-conductive adhesive / Film adhesive |
| Die quantity: |
2 ~ 6 die ( die stack and side-by-side die) |
| Bond pad pitch: |
50 micron |
| Wire loop height (max): |
3 - 8 mils |
| Elastomer thickness: |
2 - 7 mils (same size die, large die / small die stack) |
| Solder plating: |
85/15 Sn/Pb (Pb Free option available) |
| Marking: |
Laser |
| GaAs wafer handling |
Wafer format, pre-sawn on rings, scribe and break |
| Wafer backgrinding: |
Not offered for GaAs, others available |
Test Services:
Please contact the Test Product Group for details on the available services including:
- Program generation / conversion
- Product engineering support
- Wafer sort
- Burn-in
- 256 pin x 400 MHz test system available
- -55 °C to +165 ºC test available
- Strip test available on selective package type basis
Shipping:
- This product is shipped in JEDEC outline trays or clear antistatic tubes
Package |
Lead Count |
MCP 1 |
MCP 2 |
MCP 3 |
Stacked Die |
EXPOSED PAD
|
ALL
|
X
|
X
|
*
|
X
|
LQFP
|
ALL
|
X
|
X
|
X
|
X
|
MQFP
|
ALL
|
X
|
X
|
X
|
X
|
PDIP
|
ALL
|
X
|
X
|
X
|
N/A
|
SOIC
|
ALL
|
X
|
X
|
X
|
*
|
SSOP
|
ALL
|
X
|
X
|
X
|
*
|
TSOP
|
ALL
|
X
|
X
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N/A
|
X
|
TSSOP
|
ALL
|
X
|
X
|
N/A
|
*
|
* = Under Development
Cross Sections:
Additional Information:
| Description |
File Type |
File Size |
MCP & Stacked Leadframe Packages
Data Sheet |
|
156 kb
|
For more information on the MCP package, please contact an Amkor Regional Sales Office near you, your Account Manager or fill out the Request for Additional Information Form.
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