Amkor offers Wafer Level Chip Scale Packaging (WLCSP) to form solder bumps on device I/O pads or to add a copper redistribution layer and route from I/O pads to solder bumps on JEDEC / EIAJ standard pitches. WLCSP is a true chip-scale package, offering the smallest possible footprint. Amkor provides wafer bumping, wafer level test, back grind, dicing, and packing in tape & reel to support a full turn-key WLCSP solution. In addition, Amkor is able to integrate its wafer bumping products into high performance packaging options, such as Flip Chip CSP (fcCSP) and System in Package (SiP). Amkor truly provides one-stop, hassle-free support for wafer bumping, packaging, and test solutions, enabling you to meet your cost and time-to-market objectives.
Three WLCSP options are offered:
- The CSPnl Bump on Repassivation (BoR) option provides a reliable, cost-effective, true chip-scale package on devices not requiring redistribution. The BoR option utilizes a polyimide repassivation layer with excellent electrical / mechanical properties. A nickel-based or copper Under Bump Metallurgy (UBM) is added, and solder bumps are then placed directly over die I/O pads. The technology used for CSPnl results in robust packages that do not require underfill in their applications. CSPnl is designed to utilize industry-standard surface mount assembly and reflow techniques.
- The CSPnl Bump on Redistribution (RDL) option adds a plated copper redistribution layer to route I/O pads to JEDEC / EIAJ standard pitches, avoiding the need to redesign legacy parts for CSP applications. Nickel-based or copper UBM is offered, along with polyimide or PBO repassivation. CSPnl with RDL utilizes industry-standard surface mount assembly and reflow techniques, and does not require underfill.
- CSPn3 utilizes one layer of copper for both redistribution and UBM. This simplified process flow reduces cost and cycle time. CSPn3 has been in production since 2009, and current output exceeds 500M units/year. This WLCSP option utilizes industry-standard surface mount assembly and reflow techniques, and does not require underfill.
Applications
Amkor's WLCSP is ideal for portable communications and related applications that require a low cost packaging solution with small form factor and improved signal propagation characteristics. EEPROM, flash, power management, integrated passive networks, and standard analog devices are all technologies that benefit from wafer level packaging. End products include mobile phones, PDAs, laptop PCs, disk drives, digital cameras, MP3 players, GPS navigation devices, and other portable products.
WLCSP Features
- 4 - 196 ball count
- 0.8 mm – 6.5 mm body size
- Repassivation, Redistribution and Bumping options available
- Electroplated and Ball-loaded bumping options
- Eutectic and Lead-free solder
- Standard JEDEC / EIAJ pitches and CSP solder ball diameters
- Compatible with conventional SMT assembly and test techniques
- Back-side laser mark
- Back-side laminate
- Impressive component and board level reliability
- Cost effective packaging solution for small ICs
- No need for underfill
- Full turnkey bumping, test and TnR support
- Ship to customer in either wafer form or as singulated die in tape and reel
WLCSP Package Level Reliability:
| Temp Cycle: |
-55°C / +125°C, 1000 cycles |
| High Temp Storage: |
150°C, 1000 hours |
Moisture Resistance:
| MSL1 |
WLCSP Second Level Reliability (BLR):
| Temp Cycling: |
-40°C / +125°C, 1000 cycles |
| Drop Test: |
Per JEDEC and OEM standards |
WLCSP Capabilities and Services:
Manufacturing:
- Thin film dielectric and metal patterning
- Wafer bumping (electroplated and sphere placement)
- Automated visual inspection
- Wafer map generation
Test:
- Wafer saw
- Back grind
- Visual inspection
- Wafer map integration
- Pick to carrier tape
- Shipping material design and supply management
- Turnkey solutions
- Drop ship to final customer
Package Options / Ball Loading:
| Pitch | Sphere Diameter |
|---|
0.30 mm
| 0.20 mm
|
| 0.40 mm | 0.25 mm |
| 0.50 mm | 0.30 mm |
Process Highlights:
| Die thickness (max): | 0.27 mm - 0.45 mm |
|---|
| Bump height: | 250 µm (0.5 mm pitch), 210 µm (0.4 mm pitch), 170 µm (0.3 mm pitch) |
|---|
| Visual inspection: | Wafer map output |
|---|
| Solder ball pitch: | 0.50 mm, 0.40 mm, 0.30 mm
|
|---|
| Solder sphere diameter: | 300 µm, 250 µm, 200 µm |
|---|
| Redistribution: | 15 µm line, 15 µm space |
|---|
Standard Materials:
| Dielectric material: | Polyimide or PBO
|
|---|
| RDL: | Copper |
|---|
| UBM: | Ni-based or Copper
|
|---|
| Solder Composition | |
|---|
| Ball Loaded: | Pb-Free, Eutectic |
|---|
| Electroplated: | Pb-Free, Eutectic |
|---|
Test Services:
The WLCSP format allows for wafer sort integration resulting in reduced cost and improved cycle-time for the customer.
Shipping:
Devices are shipped in carrier tape on standard 7” or 13” reels.
WLCSP Cross Sections:


For more information on our CSPnl Wafer Level Packaging (WLP / WLCSP), please contact an Amkor Regional Sales Office near you or fill out the Request Form.