PSvfBGA (Package Stackable Very Thin Fine Pitch BGA)
PSfcCSP (Package Stackable Flip Chip CSP)
TMV^TM PoP (Through Mold Via Package on Package)

After three years of development in package stacking technology and infrastructure, Amkor launched the multiple award winning PSvfBGA platform in the 4th quarter of 2004. The next four years saw many new milestones, from the publication of JEDEC mechanical and electrical standards to a range of new customers and applications adopting PoP along with new structures in the PSvfBGA platform. By the end of 2006, PSvfBGA had become the fastest growing new package platform in Amkor's four decade history, reflecting the strong industry adoption of PoP and Amkor's technology leadership. 

PSvfBGA supports single die, stacked die using wirebond or hybrid (FC + wirebond) stacks and has been applied for flip chip (FC) applications to improve warpage control and package integrity through test and SMT handling. As handheld microprocessors have transitioned to dvanced CMOS nodes with higher speed cores with higher I/O, there has been a transition from wirebond to flip chip die designs. Flip chip enables the use of an exposed die bottom package that integrates the package stacking design features of PSvfBGA in a fcCSP assembly flow, which Amkor calls PSfcCSP. PSfcCSP has a thin exposed FC die enabling fine pitch stacked interfaces at 0.5mm pitch which is a challenge in a center molded PSvfBGA structure.

Amkor is now entering the second generation for PoP applications where new memory architectures required in mobile multimedia applications, demand higher density stacked interfaces in combination with PoP mounted area and height reductions. The current PSvfBGA and PSfcCSP structures limit the ability of the memory interface to scale in density and pitch, thus a new bottom PoP structure was needed.

After three years of development, Amkor introduced the next generation PoP solution with new technologies to create interconnect vias through the mold cap, naming this technology through mold via (TMV™). TMV™ technology provides a stable bottom package that enables use of thinner substrates with a larger die to package ratio. TMV™ enabled PoP can support single, stacked die or FC designs. TMV™ is an ideal solution for the emerging 0.4mm pitch low power DDR2 memory interface requirements and enables the stacked interface to scale with solder ball pitch densities to 0.3mm pitch or below.

The next few years promise to provide many new challenges and applications for PoP, as handheld multimedia applications continue to demand higher signal processing power and data storage capabilities. Amkor is committed to maintain strong development and production capabilities to ensure we are at the forefront in meeting next generation PoP requirements.

Contact Amkor  the latest PSvfBGA capabilities, and for full review of our PoP technology and roadmaps.

For more information on PSvfBGA, please contact an Amkor Regional Sales Office near you or fill out the Request Form.