Amkor's wafer level packaging (WLCSP) service meets the industry's growing demand for full turnkey assembly and test solutions for CSP (Chip Scale Package) products. Through the acquisition of Unitive®, Amkor has adopted the CSPnl as its standard wafer level package offering. CSPnl represents the next level in wafer level chip scale packaging as demonstrated by its proven benchmark reliability. Amkor’s CSPnl has been widely adopted as the industry standard for cost effective, reliable, high performance wafer level CSP applications. By integrating our CSPnl™ packaging technology with existing die processing and testing services as well as new die processing technologies developed by Unitive®, Amkor is able to offer a full turnkey solution for wafer level products.

CSPnl is a true wafer level CSP package that can incorporate thin film redistribution films to route I/O pads to JEDEC / EIAJ standard pitches, and thereby avoid the need to redesign legacy parts for CSP applications. It is available in two options: Bump on Repassivation (BOR) and Bump on Redistribution (RDL). The technology used for CSPnl results in robust packages that do not require underfill in their applications. CSPnl is designed to utilize industry-standard surface mount assembly and reflow techniques. By using conventional SMT placement equipment and avoiding the need for underfill, the end-user experiences many of the cost benefits associated with other JEDEC standard area array packages.

The CSPnl Bump on Repassivation (BOR) option provides a reliable, cost-effective true wafer level CSP package on devices not requiring redistribution. The BOR option can be used to form solder bumps on the device I/O pads either directly over the customer passivation or over a photo-imagable repassivation layer with excellent electrical / mechanical properties. The technology used for CSPnl results in robust packages that do not require underfill in their applications. CSPnl is designed to utilize industry-standard surface mount assembly and reflow techniques. By using conventional SMT placement equipment and avoiding the need for underfill, the end-user experiences many of the cost benefits associated with other JEDEC standard area array packages.

The CSPnl Bump on Redistribution (RDL) option provides a true wafer level CSP package that can incorporate thin film redistribution films to route I/O pads to JEDEC / EIAJ standard pitches, and thereby, avoiding the need to redesign legacy parts for CSP applications. The technology used for CSPnl results in robust packages that do not require underfill in their applications. CSPnl is designed to utilize industry-standard surface mount assembly and reflow techniques. By using conventional SMT placement equipment and avoiding the need for underfill, the end-user experiences many of the cost benefits associated with other JEDEC standard area array packages.

Amkor's wafer bumping and test offering is an excellent complement to other Amkor product lines. Through an integrated die processing service, Amkor is able to provide full turnkey wafer bumping, test, die singulation, and tape & reel support for wafer level packaging (WLCSP) applications. In addition, Amkor is able to integrate its wafer bumping products into high performance packaging options, such as Flip Chip CSP (fcCSP) and System in Package (SiP). Amkor truly provides one-stop, hassle-free support for wafer bumping, packaging, and test solutions, enabling you to meet your cost and time-to-market objectives.

For more information on our CSPnl Wafer Level Packaging (WLCSP), please contact an Amkor Regional Sales Office near you or fill out the Request Form.