Chip on Chip (CoC) POSSUM™ is a packaging technology designed to assemble two or more dies together without the need for TSV (Through Silicon Vias). The POSSUM technology has recently experienced increased interest because of its ability to electrically connect two die (designated as mother and daughter die) face-to-face via fine flip-chip interconnects and then to route the mother die to the package via lesser density interconnects (e.g. solder bumps). These two dies can now communicate more efficiently at faster speeds, with larger frequency bandwidth, reduced electrical resistance (R), inductance (L) and capacitive resistances, and at a much lower cost than TSV. POSSUM technology also reduces the total Z-height and package form factor of the overall assembly.


Figure 1. Conceptual illustration of a POSSUM™ assembly where the daughter die is mounted face-to-face with the larger mother die. The mother die is then flip-chip mounted onto a substrate or board

Amkor has taken a proactive but strategic approach in the research and development of this CoC POSSUM die design. This technology has been proven to be beneficial and advantageous from both a cost/economy and technical standpoint. The POSSUM packaging method has evolved from the existing technologies of Fine Pitch Copper Pillar (FPCP), which Amkor has years of experience with in mass production.

Amkor’s CoC POSSUM technology uses the existing infrastructures that are readily available, with minimum supplemental capital investment. In the Chip on Wafer (CoW) approach, the daughter (smaller) dies are flip-chip attached to the mother (larger) dies in the wafer format versus to the die format in CoC. Amkor has now been able to support CoC POSSUM builds for 200 mm and 300 mm wafers, in various applications ranging from ASIC, FPGA, MEMS, microcontrollers and memory devices.

This technology has been developed over the course of 3 years, in parallel with engaging key alpha customers for strategic market segments. This has allowed Amkor to support a wide range of products with a vast variety of application areas in the microsensors, microcontroller, automotive, wireless, optoelectronics and mobile arena. Many Amkor customers are now looking into adopting this technology for their products with mass production targeted in 2014.

In addition to establishing a strong technical and business platform for two die CoC POSSUM packaging, Amkor is extending this platform into increasingly desired advanced 3D structures. Amkor’s key enabling technologies such as Through-Mold Via (TMV®), Fine Pitch Copper Pillar (FPCP), and Cu Core solder balls, extend the POSSUM technology into double or triple POSSUM integrations, which support future 3D system level integration at a lower cost.

POSSUM CoC Cross Section

Figure 2. Double POSSUM™ multi-stacked die configurations without the use of TSVs. Multiple die types such as MEMS, ASICs, microcontrollers, memory, etc. can be nested through this method.

For more information on our Chip-on-Chip (CoC) POSSUM Packaging Technology, please contact an Amkor Regional Sales Office near you or fill out the Request for Information Form.


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