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CSPnl™ Bump on Pad (BOP)
(DSBGA / WLCSP / WCSP / WLP) - Wafer Level Packaging

CSPnl Ultra CSP / UFBGA / WLCSP / Wafer Level Packaging Amkor's wafer level packaging service meets the industry's growing demand for full turnkey assembly and test solutions for CSP (Chip Scale Package) products. Through the acquisition of Unitive®, Amkor has adopted the CSPnl™ as its standard wafer level package offering. CSPnl™ represents the next level in wafer level chip scale packaging as demonstrated by its proven benchmark reliability. Amkor’s CSPnl™ has been widely adopted as the industry standard for cost effective, reliable, high performance wafer level CSP applications. By integrating our CSPnl™ packaging technology with existing die processing and testing services as well as new die processing technologies developed by Unitive®, Amkor is able to offer a full turnkey solution for wafer level products.

The CSPnl™ Bump on Pad (BOP) option provides a reliable, cost-effective true wafer level CSP package on devices not requiring redistribution. The BOP option can be used to form solder bumps on the device I/O pads either directly over the customer passivation or over a photo-imagable repassivation layer with excellent electrical/mechanical properties such as Polyimide or BCB. The technology used for CSPnl™ results in robust packages that do not require underfill in their applications. CSPnl™ is designed to utilize industry-standard surface mount assembly and reflow techniques. By using conventional SMT placement equipment and avoiding the need for underfill, the end-user experiences many of the cost benefits associated with other JEDEC standard area array packages. CSPnl™ is also available in other options such as Bump on Repassivation / Redistribution and Bump on Thick Repassivation / Redistribution.

Amkor's wafer bumping and test offering is an excellent complement to other Amkor product lines. Through an integrated die processing service, Amkor is able to provide full turnkey wafer bumping, test, die singulation, and tape & reel support for wafer level packaging applications. In addition, Amkor is able to integrate its wafer bumping products into high performance packaging options, such as Flip Chip CSP (fcCSP) and System in Package (SiP). Amkor truly provides one-stop, hassle-free support for wafer bumping, packaging, and test solutions, enabling you to meet your cost and time-to-market objectives.

Applications:

Amkor's CSPnl™ is ideal for portable communications and related applications that require a low cost packaging solution with small form factor and improved signal propagation characteristics. EEPROM, flash, DRAM, integrated passive networks, and standard analog devices are all technologies that benefit from the CSPnl™ package attributes. End products include mobile phones, PDAs, laptop PCs, disk drives, digital cameras, MP3 players, GPS navigation devices, and other portable products.

Features:

  • 4 - 25 ball count
  • 0.8 mm – 2.5 mm body size
  • Direct bumping and Repassivation / Bumping options available
  • Electroplated and Ball-loaded bumping options
  • Eutectic, High Lead and Lead-free solder
  • Standard JEDEC / EIAJ pitches and CSP solder ball diameters
  • Compatible with conventional SMT assembly and test techniques
  • Back-side laser mark compatible
  • Back-side laminate
  • Impressive component and board level reliability
  • Cost effective packaging solution for small ICs
  • No need for underfill
  • Full turnkey bumping, test and TnR support
  • Ship to customer in either wafer form or singulated form

Package Options / Ball Loading:

Pitch   Sphere Diameter  
0.40 mm     0.25 mm  
0.50 mm     0.30 mm  
0.65 mm     0.35 mm  
0.75 mm     0.50 mm  

Package Level Reliability:

Autoclave (PCT):   121°C / 100% RH / 15 psig, 240 hours
Temp Cycle:   -55°C / +125°C, 500 cycles
High temp storage:   170°C, 420 hours

Second Level Reliability (BLR):

HAST:   130°C / 85%RH / 33.5 psia / Biased, 96 hours
HTOL:   150°C / Biased, 300 hours
Temp Cycle :   -40°C / +125°C, 1000 cycles
Key Push :   100 cycles / min, 2.7mm max displacement
Bend Test:   Strain rate 5 mm / min, 85 mm span
Drop Test:   50 cm height

Process Highlights:

Die thickness (max):   0.27 mm - 0.45 mm
Bump height:   250 µm (0.5 mm pitch), 210 µm (0.4 mm pitch)
Visual inspection:   Wafer map output
Solder ball pitch:   0.50 mm, 0.40 mm
Solder sphere diameter:   300 µm, 250 µm

Standard Materials:

Dielectric material:   Polyimide
RDL:   Copper
UBM:   Ni-based UBM
Solder Composition:   Ball Loaded: Pb-Free, Eutectic, High Pb
  Electroplated: Pb-Free, Eutectic, High Pb

Test Services:

The CSPnl™ format allows for wafer sort integration resulting in reduced cost and improved cycle-time for the customer.

Shipping:

CSPnl™ packaged devices are shipped in standard wafer magazines or may be singulated for shipment in tape or tray.

Capabilities and Services:

Design:

  • Layout
  • Mask tooling

Manufacturing:

  • Thin film dielectric and metal patterning
  • Wafer bumping (electroplated and sphere placement)
  • Automated visual inspection
  • Wafer map generation

Test:

  • Test software and hardware development
  • Probe card design, service, and support
  • Test program transfer
  • Wafer sort for memory, logic, and analog applications

Die Processing Integration and Support:

  • Wafer saw
  • Visual inspection
  • Wafer map integration
  • PnP to tape or tray
  • Shipping material design and supply management
  • Turnkey solutions
  • Drop ship to final customer

Cross Sections:

Bump on Pad with Repassivation

Additional Information:

Description File Type File Size
  CSPnl™ Data Sheet
161 kb
  CSPnl™ Bump on Repassivation /
  Redistribution Data Sheet
139 kb
  CSPnl™ Bump on Pad Data Sheet
132 kb
  Die Processing Service Data Sheet
114 kb
  fcCSP Data Sheet
120 kb
  System in Package (SiP) Technology
  Solution Data Sheet
92 kb

For more information on the CSPnl™ and Wafer Level Packaging, please contact an Amkor Regional Sales Office near you, your Account Manager or fill out the Request for Additional Information Form.


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