Amkor Flip Chip BGA (FCBGA) packages are assembled around state-of-the-art, single unit laminate or ceramic substrates. Utilizing multiple high density routing layers, laser drilled blind, buried, and stacked vias, and ultra-fine line / space metallization, FCBGA substrates have the highest routing density available. The variety of FCBGA package options allows package selection to be tailored to the specific thermal needs of the end product. Amkor offers FCBGA packaging in a variety of product formats to fit a wide range of end application requirements.
Amkor Technology offers the fcCSP package -- a flip chip solution in a CSP package format. This package construction utilizes Pb-Free (or Eut. SnPb) flip chip interconnect technology, in either area array or peripheral bump layout, replacing standard wire-bond interconnect. Current wafer bump technology and flip chip assembly process allows for peripheral flip chip bumping or area array bumping, with either solder or Copper Pillar (CuP) Bump Technology. The fcCSP is also available in LGA format, allowing for a lower minimum package thickness.
Wafer Level Packaging Solutions (DSBGA | WLCSP | WLP)
Amkor offers Wafer Level CSP (WLCSP) to form solder bumps on device I/O pads or to add a copper redistribution layer and route from I/O pads to solder bumps on JEDEC / EIAJ standard pitches. WLCSP is a true chip-scale package, offering the smallest possible footprint. Amkor provides wafer bumping, wafer level test, back grind, dicing, and packing in tape & reel to support a full turn-key WLCSP solution. Amkor is able to integrate its wafer bumping products into high performance packaging options, such as fcCSP & SiP.
|11/20/14||Amkor Technology to Present at Upcoming Conferences|
|10/27/14||Amkor Technology Reports Financial Results for the Third Quarter 2014|
|10/21/14||Amkor Technology to Announce Third Quarter 2014 Financial Results on October 27, 2014|
|10/12/14||Amkor Technology Announces Rulings in Tessera Proceedings|
|Amkor Article in CSR June Issue, "Enabling a Multiple Processor SiP with 2.5D TSVs" Technical Article
|"Core Power Delivery Network Analysis of Core and Coreless Substrates in a Multilayer Organic Buildup Package", White Paper
|Amkor article in China Integrated Circuit Magazine April 2014 Issue, "Trends and Considerations in Automotive Electronic Packaging" (Chinese)
|Amkor article in China Integrated Circuit Magazine March 2014 Issue, "Amkor Technology - Company Profile" (Chinese)
|Amkor article in China Integrated Circuit Magazine March 2014 Issue, "Trends for the Next Generation of PoP Package and Its Warpage Control" (Chinese)